1. Field of the Invention
The present invention relates to a transistor circuit and more particularly, to a transistor circuit equipped with direct-coupled stages that compensates the effect caused by the shift of the operating point of a transistor or transistors due to high-level input, which is preferably applied to radio communication systems such as portable or mobile telephones operable at a low supply voltage of approximately 1 V.
2. Description of the Prior Art
In recent years, to downsize radio communication systems such as mobile telephones, more and more Integrated Circuits (ICs) have been incorporated into the systems. Under the circumstances, the ICs need to be formed as small as possible, because the chip size of the ICs affects directly the size of the systems.
As known well, generally, the chip area of a capacitor is comparatively large with respect to other electronic elements such as a resistor and a transistor and at the same time, it increases proportionally with the increasing capacitance value. This means that capacitors form a bottleneck in decreasing the chip size of ICs.
Discrete capacitor components may be prepared outside ICs and connected to the ICs, reducing the number of capacitors in ICs. In this case, however, there arises a disadvantage that discrete capacitor components increase the overall mounting area of parts or subsystems of radio communication systems, which is contrary to the downsizing of radio communication systems. Accordingly, it is necessary that the number itself of capacitors in the systems is reduced.
As a result, to reduce the number itself of capacitors in the ICs designed for the radio communication systems of this sort, the direct-coupling configuration has been usually used to interconnect adjoining stages of transistor circuits such as amplifiers, frequency mixers, and so on in the ICs.
FIG. 1 shows the circuit configuration of a prior-art transistor amplifier circuit incorporated into an IC for a mobile telephone. In FIG. 1, the input of the prior-art transistor amplifier circuit 100 is connected to an antenna 101 through a tuning circuit 102 and the output thereof is connected to the input of a demodulator 105. The output of the demodulator 10; is connected to the input of a data processor 106. The output of the data processor 106 is connected to the input of a reception indicator 107.
The antenna 101 receives radio wave including transmitted Radio frequency (RF) signals. The tuning circuit 102 selects a desired one of the RF signals thus received by the antenna 101 and outputs the desired, selected RF signal to the amplifier circuit 100. The RP signal thus inputted into the amplifier circuit 100 is referred as an input voltage VIN.
The amplifier circuit 100 amplifies the input voltage VIN and outputs an amplified RF signal to the demodulator 105. The amplified RF signal thus outputted from the amplifier circuit 100 is referred as an output voltage VOUT.
The demodulator 105 demodulates the RE signal (i.e., the output voltage VOUT) outputted from the amplifier circuit 100 and outputs a demodulated signal to the data processor 106. The data processor 106 performs predetermined data processing operations with respect to the demodulated signal. If the identification number (ID No.) included in the demodulated signal accords with the ID No. of the user or holder, the data processor 106 sends a specific signal to the reception indicator 107, notifying the user of the reception of communications or messages. Thereafter, the user accesses the received communications or messages as necessary.
As seen from FIG. 1, the prior-art amplifier circuit 100 has two amplifier stages 103 and 104 directly-coupled together without using any coupling capacitors.
The first amplifier stage 103 has an npn-type bipolar transistor TR101 whose emitter is connected to the ground and a load resistor R101 (resistance: RL) connected to the collector of the transistor TR101. The input voltage VIN from the tuning circuit 102 is applied to the base of the transistor TR101. The collector of the transistor TR101 is connected through the load resistor R101 to a power supply and is applied with a constant supply voltage VCC. Here, VCC=1 V. An amplified voltage of VIN, i.e, an output voltage V1 of the first amplifier stage 103, is derived from the collector of the transistor TR101.
The second amplifier stage 104 has an npn-type bipolar transistor TR102 whose emitter is connected to the ground and a load resistor R104 connected to the collector of the transistor TR102. The output voltage V1 of the first amplifier stage 103 is applied to the base of the transistor TR102 through a coupling resistor R103. The collector of the transistor TR102 is connected through the load resistor R104 to the power supply of VCC and is applied with the constant supply voltage VCC. An amplified voltage of V1, i.e., the output voltage VOUT of the second amplifier stage 104, is derived from the collector of the transistor TR102 and is applied to the demodulator 105.
The strength of the transmitted radio wave fluctuates in the air due to the change of the propagation and/or reflection conditions. If the antenna 101 is located in a place where the strength of the radio wave is in a high level, the input level for the first amplifier stage 103 of the amplifier circuit 100 (i.e., the input voltage VIN, to the first amplifier stage 103) has a large magnitude. Obviously, due to the amplification operation in the first amplifier stage 103, the output voltage VOUT of the amplifier circuit 100 has a larger magnitude than that of the input voltage VIN. This means that the output voltage VOUT of the amplifier circuit 100 has an enough magnitude for receiving the transmitted communications or messages. In spite of this fact, there is a possibility that the telephone shown in FIG. 1 is unable to perform its reception operation, the reason of which is as follows.
Here, as shown in FIG. 1, the base-to-emitter voltage, the collector-to-emitter voltage, the base current, and the collector current of the transistor TR101 are defined as VBE101, VCE101, IB101, and IC101, respectively. Similarly, the base-to-emitter voltage, the collector-to-emitter voltage, the base current, and the collector current of the transistor TR102 are defined as VBE102, VCE102, IB102, and IC102, respectively.
The input voltage VIN is expressed as the sum of the bias (dc) component VBB and the signal (ac) component VIN. Then, the base-to-emitter voltage VBE101 is equal to the input voltage VIN and therefore, the following equation (1) is established.
VIN=VBE101=VBB+VINxe2x80x83xe2x80x83(1)
The base current IB101, of the transistor TR101 is expressed as the sum of the bias (dc) component IB101 and the signal (ac) component iB101. Thus, the following equation (2) is established.
IB101=IBB101+IB101xe2x80x83xe2x80x83(2)
FIG. 2 shows the IBE101xe2x88x92VBE101 characteristic of the transistor TR101 in the first amplifier stage 103, in which the reference character P1 denotes the operating point of the transistor TR101 located on the curve 52 of the IBE101xe2x88x92VBE101 characteristic. As seen from the equations (1) and (2), the operating point P1 has an abscissa value of VBB and an ordinate value of IBB101.
The input voltage VIN (i.e., the base-to-emitter voltage VBE101 of the transistor TR101) varies with time as schematically shown by periodic waveforms 51a and 51b in FIG. 2. The waveform 51a having a small magnitude indicates the change of VIN and VBE101 at the received strength of the radio wave being in a low level. The waveform 51b having a large magnitude indicates the change of VIN and VBE101 at the received strength of the radio wave being in a very high level.
Due to the change of VIN or VBE101, the base current IB101, of the transistor TR101 varies with time as schematically shown by periodic waveforms 53a and 53b in FIG. 2. The waveform 53a having a small magnitude indicates the change of IB101 caused by the waveform 51a of VIN and VBE101 having a small magnitude. The waveform 53b having a large magnitude indicates the change of IB101, caused by the waveform 51b of VIN and VBE101 having a large magnitude.
As seen from the waveform 53a, when the received strength of the radio wave is low, no problems occur. However, when the received strength of the radio wave is very high, there arises a problem that the waveform 53b has a large distortion. This is because the portion of the waveform 53b above the level IBB101 is fully amplified while the portion of the waveform 53b below the level IBB101 is not fully amplified, which is due to the shape of the IBE101xe2x88x92VBE101 characteristic curve 52.
The state shown by the waveform 53b is equivalent to the state that the dc component or average of the base current IB101 is raised from its original value IB101 to an unwanted value IB101, where IB101 less than IB101xe2x80x2. Thus, the dc component or average of the collector current IC101, of the transistor TR101 is increased, resulting in the operating point P2 shown in FIG. 3 being shifted to the point P2xe2x80x2.
FIG. 3 shows the IC101xe2x88x92VC101 characteristic of the transistor TR101 in the first amplifier stage 103, in which the reference number 60 denotes the load line of the transistor TR101. The curve 63 denotes the IC101xe2x88x92VCE101, characteristic at IB101=IBB101 (i.e., at the operating point P1 in FIG. 2). The curve 64 denotes the IC101xe2x88x92VCE101 characteristic at IB101=IBB101xe2x80x2.
Because of the above-described unwanted increase of the dc component value of the collector current IC101 of the transistor TR101, the operating point P2 of the transistor TR101 located on the curve 63 is shifted to the unwanted point P2xe2x80x2 located on the curve 64 The unwanted point P2xe2x80x2 is located within the saturation reaction 62 of the operation of the transistor TR101.
The dc component value of the collector current IC101 is very large at the unwanted point P2xe2x80x2 and therefore, the voltage drop caused by the load resistor R101 is very large. The large voltage drop thus caused decreases the dc component value of collector-to-emitter voltage VCE101 of the transistor TR101 (i.e., the dc component value of the output voltage V1 of the first amplifier stage 103). Since the output voltage V1 is equal to the base-to-emitter voltage VBE102 of the transistor TR102 in the second amplifier stage 104, the dc component value of the base-to-emitter voltage VBE102 is largely lowered from its wanted value.
As a result, as shown in FIG. 4 indicating the relationship between the base-to-emitter voltage VBE102 and the base current IB102 of the transistor TR102, the dc component value of the base-to-emitter voltage VBE102 is much smaller than its wanted value, in other words, the operating point of the transistor TR102 is displaced from the IBE102 xe2x88x92VBE102 curve 55. This means that the transistor TR102 is unable to perform its amplification operation and that the telephone in FIG. 1 is unable to perform its reception operation in spite of the strength of the received radio wave being sufficiently high. In FIG. 4, the reference numeral 54 denotes the waveform of the base-to-emitter voltage VBE102, i.e., the output voltage V1 of the first amplifier stage 103.
For example, due to the operating-point shift from P2 to P2xe2x80x2 in FIG. 3, the dc or bias component of the collector-to-emitter voltage VCE101 of the transistor TR101 (i.e., the output voltage V1 of the first amplifier stage 103) is lowered abruptly from 0.8 V to 0.2 V, while the supply voltage VCC is equal to 1 V. As known well, generally, the transistor TR102 starts its amplification operation when the base-to-emitter voltage VBE102 is approximately 0.6 V. Thus, in this case, the transistor TR102 is unable to amplify the applied voltage V1, in other words, no signal is transmitted from the first stage 103 to the second stage 104.
As explained above, the prior-art transistor amplifier circuit 100 shown in FIG. 1 has a problem that there is a possibility that the telephone is unable to perform its reception operation in spite of the magnitude of the received radio wave being high. This problem can be solved or suppressed by raising the supply voltage VCC. However, the supply voltage increase is not preferred in the communication systems such as portable telephones from the viewpoint that the power consumption should be as low as possible.
Accordingly, an object of the present invention to provide a transistor circuit that ensures signal transmission between adjoining direct-coupled stages at a low supply voltage even when an input signal is in a high level.
Another object of the present invention to provide a transistor circuit that compensates the effect caused by the shift of the operating point of a transistor or transistors due to high-level input.
The above objects together with others not specifically mentioned will become clear to those skilled in the art from the following description.
A transistor circuit according to the present invention is comprised of a first stage having a first transistor and a first load connected to a collector or drain of the first transistor, and a second stage having a second transistor.
An input voltage is applied to a base or gate of the first transistor in the first stage. The first transistor produces a first output current flowing through the first load according to the input voltage, thereby outputting a first output voltage at the collector or drain of the first transistor. The first output voltage from the first stage is applied to a base or gate of the second transistor in the second stage without using any coupling capacitor.
The first load has a variable resistance responsive to a magnitude of a do component of the first output current.
When the magnitude of the dc component of the first output current is increased from a predetermined value due to a magnitude increase of the input voltage, thereby decreasing a magnitude of a dc component of the first output voltage, the variable resistance of the first load is decreased so as to compensate the decreased magnitude of the dc component of the first output voltage.
With the transistor circuit according to the present invention, the first load has a variable resistance responsive to the magnitude of the dc component of the first output current. When the magnitude of the dc component of the first output current is increased from the predetermined value due to a magnitude increase of the input voltage, thereby decreasing the magnitude of the dc component of the first output voltage, the variable resistance of the first load is decreased so as to compensate the decreased magnitude of the dc component of the first output voltage.
Therefore, even if the magnitude of the dc component of the first output voltage in the first stage is decreased (i.e., the operating point of the first transistor is shifted) due to a large magnitude of the input voltage at a low supply voltage, the dc component of the first output voltage can be made to have an enough value for the operation of the second transistor in the second stage. Thus, the second transistor in the second stage is capable of its operation with the applied first output voltage from the first stage even when a large amplitude signal is inputted into the first stage.
As a result, signal transmission between the direct-coupled first and second stages is ensured at a low supply voltage even when an input signal is in a high level. In other words, the effect caused by the shift of the operating point of the first transistor due to high-level input is compensated.
In a preferred embodiment of the transistor circuit according to the present invention, the first load includes a first load resistor, a second load resistor, and a first diode. The first load resistor is connected to the collector or drain of the first transistor. The second load resistor and the first diode are connected in series. The load resistor and the first diode are connected in parallel to the first load resistor. A forward direction of the first diode and a direction of the first output current are same.
In this embodiment, there arises an additional advantage that the first load having the variable resistance responsive to the magnitude of the dc component of the first output current can be realized by a simple and low-cost configuration.
In this embodiment, it is preferred that the first diode is turned on when the magnitude of the dc component of the first output current is greater than a specific value, allowing a part of the first output current to flow through the second load resistor. In this case, there is an additional advantage that the current path for the second load resistor can be automatically turned on or off by simply setting in advance the specific value of the first diode.
As the first diode, a typical junction diode or Zener diode may be preferably used.
In another preferred embodiment of the transistor circuit according to the present invention, the second transistor has a second load connected to a collector or drain of the second transistor. The second transistor produces a second output current flowing through the second load according to the first output voltage from the first stage, thereby outputting a second output voltage at the collector or drain of the second transistor. The second load has a variable resistance responsive to a magnitude of a dc component of the second output current.
In this embodiment, there arises an additional advantage that signal transmission between the second stage and a third stage directly-coupled with the second stage is ensured at a low supply voltage even when a large amplitude signal is inputted into the second stage.
In still another preferred embodiment of the transistor circuit according to the present invention, each of the first and second transistors is a bipolar transistor having a common-emitter configuration. In this embodiment, there arises an additional advantage that the advantage of the present invention is effectively exhibited.
In the transistor circuit according to the present invention, each of the first and second transistors may be a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor) having a common-source configuration.
Preferably, the first stage has a single-transistor configuration or a differential transistor pair configuration. However, any other configuration may be applied to the first stage if the first and second transistors are used as active elements.